Book Fire Online by http://bookfire.net

Exercises

What are the main functions of the CPU?
Explain what the CPU should do when an interrupt occurs. Include in your answer the method the CPU uses to detect an interrupt, how it is handled, and what happens when the interrupt has been serviced.
Hints and Answers How many bits would you need to address a 2M x 32 memory if
1. Hints and Answers The memory is byte-addressable?
2. Hints and Answers The memory is word-addressable?
How many bits are required to address a 4M x 16 main memory if
1. Main memory is byte-addressable?
2. Main memory is word-addressable?
How many bits are required to address a 1M x 8 main memory if
1. Main memory is byte-addressable?
2. Main memory is word-addressable?
Hints and Answers Suppose that a 2M x 16 main memory is built using 256KB x 8 RAM chips and memory is word-addressable.
1. Hints and Answers How many RAM chips are necessary?
2. Hints and Answers How many RAM chips are there per memory word?
3. Hints and Answers How many address bits are needed for each RAM chip?
4. Hints and Answers How many banks will this memory have?
5. Hints and Answers How many address bits are needed for all of memory?
6. Hints and Answers If high-order interleaving is used, where would address 14 (which is E in hex) be located?
7. Hints and Answers Repeat Exercise 6f for low-order interleaving.
Redo Exercise 6 assuming a 16M x 16 memory built using 512K x 8 RAM chips.
A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory.
1. How many bits are needed for the opcode?
2. How many bits are left for the address part of the instruction?
3. What is the maximum allowable size for memory?
4. What is the largest unsigned binary number that can be accommodated in one word of memory?
Assume a 2²⁰ byte memory:
1. Hints and Answers What are the lowest and highest addresses if memory is byte-addressable?
2. Hints and Answers What are the lowest and highest addresses if memory is word-addressable, assuming a 16-bit word?
3. What are the lowest and highest addresses if memory is word-addressable, assuming a 32-bit word?
Given a memory of 2048 bytes consisting of several 64 Byte x 8 RAM chips, and assuming byte-addressable memory, which of the following seven diagrams indicates the correct way to use the address bits? Explain your answer.
Explain the steps in the fetch-decode-execute cycle. Your explanation should include what is happening in the various registers.
Hints and Answers Explain why, in MARIE, the MAR is only 12 bits wide while the AC is 16 bits wide.

List the hexadecimal code for the following program (hand assemble it).

    Label    Hex Address    Instruction
        100    Load A
        101    Add One
        102    Jump S1
    S2,    103    Add One
        104    Store A
        105    Halt
    S1,    106    Add A
        107    Jump S2
    A,    108    HEX 0023
    One,    109    HEX 0001

Hints and Answers What are the contents of the symbol table for the preceding program?
Given the instruction set for MARIE in this chapter:
1. Decipher the following MARIE machine language instructions (write the assembly language equivalent):
  1. Hints and Answers 0010000000000111
  2. 1001000000001011
  3. 0011000000001001
2. Write the following code segment in MARIE's assembly language:
```
if X > 1 then
   Y := X + X;
   X := 0;
endif;
   Y := Y + 1;
```
3. What are the potential problems (perhaps more than one) with the following assembly language code fragment (implementing a subroutine) written to run on MARIE? The subroutine assumes the parameter to be passed is in the AC and should double this value. The Main part of the program includes a sample call to the subroutine. You can assume this fragment is part of a larger program.
```
Main,    Load    X
    Jump    Sub1
Sret,        Store X
    . . .
Sub1,    Add    X
    Jump    Sret
```
Write a MARIE program to evaluate the expression A x B + C x D.
Write the following code segment in MARIE assembly language:
```
X := 1;
while X < 10 do
   X := X + 1;
endwhile;
```
Write the following code segment in MARIE assembly language:
```
Sum := 0;
for X := 1 to 10 do
   Sum := Sum + X;
endwhile;
```
Write a MARIE program using a loop that multiplies two positive numbers by using repeated addition. For example, to multiple 3 x 6, the program would add 3 six times, or 3 + 3 + 3 + 3 + 3 + 3.
Write a MARIE subroutine to subtract two numbers.
More registers appear to be a good thing, in terms of reducing the total number of memory accesses a program might require. Give an arithmetic example to support this statement. First, determine the number of memory accesses necessary using MARIE and the two registers for holding memory data values (AC and MBR). Then perform the same arithmetic computation for a processor that has more than three registers to hold memory data values.
MARIE saves the return address for a subroutine in memory, at a location designated by the jump-and-store instruction. In some architectures, this address is stored in a register, and in many it is stored on a stack. Which of these methods would best handle recursion? Explain your answer.
Provide a trace (similar to the one in Figure 4.13) for Example 4.2.
Provide a trace (similar to the one in Figure 4.13) for Example 4.3.
Suppose we add the following instruction to MARIE's ISA:
```
IncSZ Operand
```
This instruction increments the value with effective address "Operand," and if this newly incremented value is equal to 0, the program counter is incremented by 1. Basically, we are incrementing the operand, and if this new value is equal to 0, we skip the next instruction. Show how this instruction would be written using RTN.
Would you recommend a synchronous bus or an asynchronous bus for use between the CPU and the memory? Explain your answer.
* Pick an architecture (other than those covered in this chapter). Do research to find out how your architecture deals with the concepts introduced in this chapter, as was done for Intel and MIPS.

TRUE or FALSE

_____ If a computer uses hardwired control, the microprogram determines the instruction set for the machine. This instruction set can never be changed unless the architecture is redesigned.
_____ A branch instruction changes the flow of information by changing the PC.
_____ Registers are storage locations within the CPU itself.
_____ A two-pass assembler generally creates a symbol table during the first pass and finishes the complete translation from assembly language to machine instructions on the second.
_____ The MAR, MBR, PC, and IR registers in MARIE can be used to hold arbitrary data values.
_____ MARIE has a common bus scheme, which means a number of entities share the bus.
_____ An assembler is a program that accepts a symbolic language program and produces the binary machine language equivalent, resulting in a one-to-one correspondence between the assembly language source program and the machine language object program.
_____ If a computer uses microprogrammed control, the microprogram determines the instruction set for the machine.