Exercises

1. Assume you have a machine that uses 32-bit integers and you are storing the hex value 1234 at address 0:

   1.  Hints and Answers    Show how this is stored on a big endian machine.

   2.    Hints and Answers    Show how this is stored on a little endian machine.

   3. If you wanted to increase the hex value to 123456, which byte assignment would be more efficient, big or little endian? Explain your answer.

2. Show how the following values would be stored by machines with 32-bit words, using little endian and then big endian format. Assume each value starts at address 10₁₆. Draw a diagram of memory for each, placing the appropriate values in the correct (and labeled) memory locations.

   1. 456789A1₁₆

   2. 0000058A₁₆

   3. 14148888₁₆

3.  Hints and Answers    The first two bytes of a 2M x 16 main memory have the following hex values:

   • Byte 0 is FE

   • Byte 1 is 01

   If these bytes hold a 16-bit two's complement integer, what is its actual decimal value if:

   1.  Hints and Answers    memory is big endian?

   2.  Hints and Answers    memory is little endian?

4. What kinds of problems do you think endian-ness can cause if you wished to transfer data from a big endian machine to a little endian machine? Explain.

5.  Hints and Answers    The Population Studies Institute monitors the population of the United States. In 2000, this institute wrote a program to create files of the numbers representing populations of the various states, as well as the total population of the U.S. This program, which runs on a Motorola processor, projects the population based on various rules, such as the average number of births and deaths per year. The institute runs the program and then ships the output files to state agencies so the data values can be used as input into various applications. However, one Pennsylvania agency, running all Intel machines, encountered difficulties, as indicated by the following problem. When the 32-bit unsigned integer 1D2F37E8₁₆ (representing the overall U.S. population prediction for 2003) is used as input, and the agency's program simply outputs this input value, the U.S. population forecast for 2003 is far too large. Can you help this Pennsylvania agency by explaining what might be going wrong?

6. There are reasons for machine designers to want all instructions to be the same length. Why is this not a good idea on a stack machine?

7.  Hints and Answers    A computer has 32-bit instructions and 12-bit addresses. Suppose there are 250 2-address instructions. How many 1-address instructions can be formulated? Explain your answer.

8. Convert the following expressions from infix to reverse Polish (postfix) notation.

   1.  Hints and Answers    X x Y + W x Z + V x U

   2. W x X + W x (U x V + Z)

   3. (W x (X + Y x (U x V)))/(U x (X + Y))

9. Convert the following expressions from reverse Polish notation to infix notation.

   1. W X Y Z - + x

   2. U V W X Y Z + x + x +

   3. X Y Z + V W - x Z + +

10. 1. Write the following expression in postfix (reverse Polish) notation. Remember the rules of precedence for arithmetic operators!

       

    2. Write a program to evaluate the above arithmetic statement using a stack organized computer with zero-address instructions (so only pop and push can access memory).

11. 1. In a computer instruction format, the instruction length is 11 bits and the size of an address field is 4 bits. Is it possible to have

       5      2-address instructions

       45    1-address instructions

       32    0-address instructions

       using the format? Justify your answer.

    2. Assume that a computer architect has already designed 6 two-address and 24 zero-address instructions using the instruction format given in Problem 11. What is the maximum number of one-address instructions that can be added to the instruction set?

12. What is the difference between using direct and indirect addressing? Give an example.

13.  Hints and Answers    Suppose we have the instruction Load 1000. Given that memory and register R1 contain the values below:

    

    Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator and fill in the table below:

    Mode	Value Loaded into AC
    Immediate
    Direct
    Indirect
    Indexed

14. Suppose we have the instruction Load 500. Given that memory and register R1 contain the values below:

    

    Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator and fill in the table below:

    Mode	Value Loaded into AC
    Immediate
    Direct
    Indirect
    Indexed

15. A nonpipelined system takes 200ns to process a task. The same task can be processed in a 5-segment pipeline with a clock cycle of 40ns. Determine the speedup ratio of the pipeline for 200 tasks. What is the maximum speedup that could be achieved with the pipeline unit over the nonpipelined unit?

16. A nonpipeline system takes 100ns to process a task. The same task can be processed in a 5-stage pipeline with a clock cycle of 20ns. Determine the speedup ratio of the pipeline for 100 tasks. What is the theoretical speedup that could be achieved with the pipeline system over a nonpipelined system?

17. Write code to implement the expression A = (B + C) x (D + E) on 3-, 2-, 1-, and 0-address machines. In accordance with programming language practice, computing the expression should not change the values of its operands.

18.  Hints and Answers    A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory.

    1.  Hints and Answers    How many bits are needed for the opcode?

    2.  Hints and Answers    How many bits are left for the address part of the instruction?

    3.  Hints and Answers    What is the maximum allowable size for memory?

    4.  Hints and Answers    What is the largest unsigned binary number that can be accommodated in one word of memory?

19. The memory unit of a computer has 256K words of 32 bits each. The computer has an instruction format with 4 fields: an opcode field; a mode field to specify 1 of 7 addressing modes; a register address field to specify 1 of 60 registers; and a memory address field. Assume an instruction is 32 bits long. Answer the following:

    1. How large must the mode field be?

    2. How large must the register field be?

    3. How large must the address field be?

    4. How large is the opcode field?

20. Suppose an instruction takes four cycles to execute in a nonpipelined CPU: one cycle to fetch the instruction, one cycle to decode the instruction, one cycle to perform the ALU operation, and one cycle to store the result. In a CPU with a 4-stage pipeline, that instruction still takes four cycles to execute, so how can we say the pipeline speeds up the execution of the program?

21.    *   Pick an architecture (other than those covered in this chapter). Do research to find out how your architecture approaches the concepts introduced in this chapter, as was done for Intel, MIPS, and Java.